Frontend Capabilities
Frontend Capabilities

Special IP or Interface Design
Required by Customers

SoC Architecture Deign

NoC Bus Based on Topology
or Mesh Structure

SoC Integration and Synthesis

PPA Optimization

CDC/RDC Check

Timing Optimization

Equivalence Check

Business Scope
Various Verification Methods & Platform
Various Verification Methods & Platform
EDA Simulation & Formal
EDA Simulation & Formal
  • ● Complete set of VIPs from all mainstream vendors
  • ● Self-designed QEMU virtual platform for system bug localization
  • ● Mature testcase and automated regression tools for improving code coverage
  • ● Efficient and visual performance & power analysis tools
EDA Simulation & Formal
SoC DDR Bank Access Distribution Tool for Performance Optimization
Palladium Emulation
Rich EMU Verification Resources
Palladium Emulation
Palladium Emulation
  • ● 1,000–400,000x faster than EDA simulation
  • ● Leading hardware installed capacity and rich SpeedBridge Boards for large-scale chips
  • ● Stress test of final design with real-world stimulus
  • ● Software development and testing prior to silicon
FPGA Prototype
FPGA Prototype
  • ● Flexible platform for subsystem & IP verification and cluster for SoC verification
  • ● Automatic design partition technology and self-developed debug modules
  • ● Rich self-developed interface IP external PHY sub-board
FPGA Prototype
Innosilicon FPGA Base and Daughter Board Example

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