Innosilicon M-PHY includes transmitters and receivers to implement full-duplex operations. The IP supports multiple BURST modes, including HS and LS for improved power efficiency and multiple power saving modes where power consumption can be traded-off for recovery time.

The Innosilicon I/O and ESD are also built-in, providing a convenient, drop-in PHY. The design is optimized for high speed applications with robust timing and small silicon area.