USB 2.0/HSIC PHY(Host/Device/OTG/Hub)/
eUSB PHY
USB 2.0/HSIC PHY
(Host/Device/OTG/Hub)/
eUSB PHY
The Innosilicon USB 2.0 PHY conforms to the specification of UTMI+
level 3 Revision 1.0 (USB 2.0 Transceiver Macrocell Interface
Plus) and has excellent performance. As an integrated high-speed
mixed signal circuit, the Innosilicon USB 2.0 PHY supports not
only the Low Speed (LS) traffic at 1.5Mbps and Full Speed (FS)
traffic at 12Mbps, but also the High Speed (HS) traffic at
480Mbps, while retaining backward compatibility with USB1.1 legacy
protocol.
The Innosilicon USB 2.0 PHY is capable to handle the low-level
protocol and signaling. In transmitting mode, the PHY serializes
data, performs bit stuffing following NRZI encoding when needed,
and then generates SYNC and EOP fields. Likewise, in receiving
mode, it recovers clock from incoming data, strips the SYNC and
EOP fields, performs NRZI decoding with bit un-stuffing when
needed and then de-serializes the data. It supports17 modes of
operations, including LS, FS, HS, On-The-Go (OTG), and Device and
Host.
The Innosilicon USB 2.0 PHY can be pre-configured as a 30MHz
16-bit or 60MHz 8-bit UTMI data interface, which provides a
complete on-chip transceiver physical solution with ESD
protection.
The eUSB2 IP supports native mode and repeater mode, to make the
application more flexible. The eUSB2 repeater converts between
standard USB 2.0 and eUSB2 signaling levels, allowing legacy USB
2.0 devices to connect to a system-on-chip (SoC) with eUSB2 PHY.
Building on years of customer successes with our silicon-proven
USB PHY product line , Innosilicon provides designers with
silicon-proven, configurable eUSB2 PHYs that are compliant with
the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0
specifications.