The hard-macro PHY is well-architected for IEEE and OIF protocols, with ESD structure and BIST function accommodated. This IP provides high-speed connectivity between ICs, optics, and backplanes with a built-in low-jitter LC PLL for optimized signal integrity. The INNOSILICON™ 64G Long-Reach SerDes solution meets the functionality, power, performance and area requirements of a variety of network applications.